Not to long ago, I wrote a post about what a state machine is. That post covered the state machine as a concept and way to organize your thoughts. Well, if you are looking to use state machines in FPGA design, the idea isn’t much help without knowing how to code it.
As you know from the last post, a state machine is made up of three components. The next state logic, state register and output logic.
The first component I’ll go through is the next state logic. This is coded directly from the state diagram.
I’m going to put the state diagram here for reference.
Stepper motor controller state diagram.
This block of code creates the state variables. This way each state can be referenced by name.
This block of code creates the state registers that hold the next_state and present_state variables. This is which circle you are on on the state diagram.
This is the first chunk of the state logic. It shows, if you are in state sig4, based on the input what the next state is. This encapsulates the arrows on the state diagram.
This is the second chunk of the next state logic. It defines where you go next if you are in sig3 or sig2.
This is the third chunk of next state logic. It defines what to do if you are in state sig1 or sig0.
This is the output logic. This is represented on the state diagram as the purple text.
This is the state register. It moves the next_state to the present_state on the positive clock edge. This is what makes movement between the states in the state diagram happen.
For more information on this state diagram and full code. You can view the instructable on driving a stepper motor with FPGA.