I excited to tell you today about some new content from our partners at Xilinx through their Xilinx University Program. The Xilinx University Program, or XUP, provides educational resources for professors and students (as well as the FPGA enthusiast!) to help them better utilize Xilinx technologies. To that end, XUP has created some new libraries that can be used to build FPGA designs as schematics in Vivado’s IP Integrator.
These libraries contain various component IP cores like AND gates, XOR gates, as well as 7400 series transistor-transistor logic blocks. The components available in each library are also demonstrated in a series of premade example projects which you can use as a learning aid for schematic based FPGA design, or you can just implement the design onto your board.
These libraries, as well as the pre-made demo projects, are available on the XUP Github repository. Stay tuned future updates about the XUP Github repo.